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» Design and optimization of LC oscillators
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ICCAD
1999
IEEE
120views Hardware» more  ICCAD 1999»
13 years 9 months ago
Design and optimization of LC oscillators
We present a method for optimizing and automating component and transistor sizing for CMOS LC oscillators. We observe that the performance measures can be formulated as posynomial...
Maria del Mar Hershenson, Ali Hajimiri, Sunderaraj...
ISCAS
2003
IEEE
104views Hardware» more  ISCAS 2003»
13 years 10 months ago
Study and simulation of CMOS LC oscillator phase noise and jitter
In this work we review the processes of phase noise and jitter in electronic oscillators and the relationship between the two. Frequency and time domain simulation techniques and ...
Michael S. McCorquodale, Mei Kim Ding, Richard B. ...
GLVLSI
1998
IEEE
130views VLSI» more  GLVLSI 1998»
13 years 9 months ago
Design Issues of LC Tuned Oscillators for Integrated Transceivers
Carlo Samori, Andrea L. Lacaita, Alfio Zanchi, P. ...
ICCAD
2007
IEEE
130views Hardware» more  ICCAD 2007»
14 years 1 months ago
Modeling, optimization and control of rotary traveling-wave oscillator
Abstract— Rotary traveling-wave oscillator (RTWO) is a recently proposed transmission-line approach for multi-gigahertz rate clock generation. RTWO has the characteristics of bot...
Cheng Zhuo, Huafeng Zhang, Rupak Samanta, Jiang Hu...
DAC
2001
ACM
14 years 5 months ago
Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems
This paper describes the design of two half-rate clock and data recovery circuits for optical receivers. Targeting the data rate of 10-Gb/s, the rst implementation incorporates a ...
Jafar Savoj, Behzad Razavi