35 search results - page 6 / 7 » Design automation of self checking circuits |
DAC
2007
ACM
14 years 7 months ago
2007
ACM
Modern combinational equivalence checking (CEC) engines are complicated programs which are difficult to verify. In this paper we show how a modern CEC engine can be modified to pr...
DAC
2009
ACM
14 years 7 months ago
2009
ACM
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
DAC
2006
ACM
14 years 7 months ago
2006
ACM
Formal languages are increasingly used to describe the functional requirements (specifications) of circuits. These requirements are used as a means to communicate design intent an...
DAC
2008
ACM
14 years 7 months ago
2008
ACM
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
DAC
2003
ACM
14 years 7 months ago
2003
ACM
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...