41 search results - page 7 / 9 » Design of Reversible Quantum Ternary Comparator Circuits |
CORR
2010
Springer
13 years 3 months ago
2010
Springer
Reversible logic design has become one of the promising research directions in low power dissipating circuit design in the past few years and has found its application in low power...
FPL
2009
Springer
13 years 10 months ago
2009
Springer
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
ISLPED
1995
ACM
13 years 9 months ago
1995
ACM
A dual-rail CMOS adiabatic switching circuit approach is described which follows the electroid model of Hall. These circuits can operate in either the retractile cascade or the re...
ISLPED
2005
ACM
13 years 11 months ago
2005
ACM
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...