18 search results - page 1 / 4 » Design of a Single Event Upset (SEU) Mitigation Technique fo... |
ISQED
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
AHS
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents a unique SEU (single Event Upset) mitigation technique based upon Temporal Data Sampling for synchronous circuits and configuration bit storage for programmabl...
EDCC
2006
Springer
13 years 8 months ago
2006
Springer
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
With device size shrinking and fast rising frequency ranges, effect of cosmic radiations and alpha particles known as Single-Event-Upset (SEU), Single-Eventtransients (SET), is a ...
CSREAESA
2009
13 years 5 months ago
2009
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...