55 search results - page 3 / 11 » Design of mixed gates for leakage reduction |
ISLPED
2005
ACM
13 years 11 months ago
2005
ACM
Leakage power is one of the most critical issues for ultra-deep submicron technology. Subthreshold leakage depends exponentially on linewidth, and consequently variation in linewi...
DAC
2003
ACM
14 years 6 months ago
2003
ACM
The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limit...
ICCD
2004
IEEE
14 years 2 months ago
2004
IEEE
Leakage current is a key factor in IC power consumption even in the active operating mode. We investigate the simultaneous optimization of gate size and threshold voltage to reduc...
ICCD
2008
IEEE
14 years 2 months ago
2008
IEEE
— Run-time Active Leakage Reduction (RALR) is a recent technique and aims at aggressively reducing leakage power consumption. This paper studies the feasibility of RALR from the ...
VLSID
2005
IEEE
14 years 6 months ago
2005
IEEE
One of the main challenges for design in the presence of process variations is to cope with the uncertainties in delay and leakage power. In this paper, the influence of leakage r...