17 search results - page 3 / 4 » Design-Space Exploration of Power-Aware On Off Interconnecti... |
MICRO
2002
IEEE
13 years 10 months ago
2002
IEEE
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
ICCD
2006
IEEE
14 years 2 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
VLSID
2008
IEEE
14 years 6 months ago
2008
IEEE
Power consumption, physical size, and architecture design of sensor node processors have been the focus of sensor network research in the architecture community. What lies at the ...
MICRO
2007
IEEE
14 years 1 days ago
2007
IEEE
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
SLIP
2003
ACM
13 years 11 months ago
2003
ACM
In the past, a priori interconnect prediction, based on Rent’s rule, has been applied mainly for technology evaluation and roadmap applications. These applications do not requir...