4394 search results - page 2 / 879 » Designing agent chips |
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
Multi-site testing is a popular and effective way to increase test throughput and reduce test costs. We present a test throughput model, in which we focus on wafer testing, and co...
DATE
2008
IEEE
14 years 6 days ago
2008
IEEE
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
— We have designed and implemented the LDPC decoder chip with memory-reduction method to achieve high-throughput and practical chip size. The decoder decodes (3,6)-2304bit regula...
CEC
2009
IEEE
13 years 9 months ago
2009
IEEE
This paper presents a new unified design flow developed within the Perplexus project that aims to accelerate parallelizable data-intensive applications in the context of ubiquitous...
AI
2007
Springer
13 years 9 months ago
2007
Springer
We have constructed a poker classification system which makes informed betting decisions based upon three defining features extracted while playing poker: hand value, risk, and agg...