118 search results - page 3 / 24 » Detection of Multiple Bottleneck Bandwidth |
IPPS
1996
IEEE
13 years 9 months ago
1996
IEEE
Multiple instruction issue processors place high demands on register file bandwidth. One solution to reduce this bottleneck is the use of multiple register files. Register allocat...
ICS
1999
Tsinghua U.
13 years 9 months ago
1999
Tsinghua U.
This paper presents a technique, adaptive replication, for automatically eliminating synchronization bottlenecks in multithreaded programs that perform atomic operations on object...
ERSA
2010
13 years 3 months ago
2010
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...
JCM
2007
13 years 5 months ago
2007
—Time slot assignment is essential to provide the calculated bandwidth in a TDMA (Time Division Multiple Access)-based mobile ad hoc network (MANET), which is a focus of attentio...
CODES
2005
IEEE
13 years 7 months ago
2005
IEEE
Memory bandwidth issues present a formidable bottleneck to accelerating embedded applications, particularly data bandwidth for multiple-issue VLIW processors. Providing an efficie...