142 search results - page 2 / 29 » Determining Schedules for Reducing Power Consumption Using M... |
TVLSI
2002
13 years 4 months ago
2002
: Clock networks account for a significant fraction of the power dissipation of a chip and are critical to performance. This paper presents theory and algorithms for building a low...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
As the power consumption of modern highperformance microprocessors increases beyond 100W, power becomes an increasingly important design consideration. This paper presents a novel...
DAC
1999
ACM
13 years 9 months ago
1999
ACM
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
— Multiple power supply voltages are often used in modern high performance ICs such as microprocessors to decrease power consumption without affecting circuit speed. The system o...
ICCD
2002
IEEE
14 years 1 months ago
2002
IEEE
Multiple supply voltages, multiple transistor thresholds and transistor sizing could be used to reduce the power dissipation of digital blocks. This paper presents a framework for...