60 search results - page 12 / 12 » Deterministic Clock Gating for Microprocessor Power Reductio... |
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
—Increasing power density causes die overheating due to limited cooling capacity of the package. Conventional thermal management techniques e.g. logic shutdown, clock gating, fre...
ICCAD
2007
IEEE
13 years 6 months ago
2007
IEEE
– Interconnect issues are becoming increasingly important for ULSI systems. IntSim, an interconnect CAD tool, has been developed to obtain pitches of different wiring levels and ...
DAC
2004
ACM
13 years 8 months ago
2004
ACM
The high leakage current in nano-meter regimes is becoming a significant portion of power dissipation in CMOS circuits as threshold voltage, channel length, and gate oxide thickne...
EUROSYS
2008
ACM
14 years 1 months ago
2008
ACM
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...
ISLPED
2004
ACM
13 years 10 months ago
2004
ACM
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...