73 search results - page 1 / 15 » Deterministic Logic BIST for Transition Fault Testing |
ETS
2006
IEEE
13 years 11 months ago
2006
IEEE
BIST is an attractive approach to detect delay faults due to its inherent support for at-speed test. Deterministic logic BIST (DLBIST) is a technique which was successfully applie...
ITC
2000
IEEE
13 years 9 months ago
2000
IEEE
We present the application of a deterministic logic BIST scheme on state-of-the-art industrial circuits. Experimental results show that complete fault coverage can be achieved for...
DAC
2003
ACM
13 years 10 months ago
2003
ACM
We present a novel method to efficiently generate, compress and apply test patterns in a logic BIST architecture. Patterns are generated by a modified automatic test pattern gener...
ATS
1998
IEEE
13 years 9 months ago
1998
IEEE
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
DDECS
2006
IEEE
13 years 11 months ago
2006
IEEE
- Extension of a BIST design algorithm is proposed in this paper. The method is based on a synthesis of a combinational block - the decoder, transforming pseudo-random code words i...