11 search results - page 2 / 3 » Digital Circuit Design for Minimum Transient Energy and a Li... |
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
A parallel computing approach for large-scale SPICE-accurate circuit simulation is described that is based on a new preconditioned iterative solver. The preconditioner involves the...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Crosstalk noise in the clock network of digital circuits is often detected late in the design cycle, sometimes as late as after first silicon. It is therefore necessary to fix cros...
ICCAD
1998
IEEE
13 years 9 months ago
1998
IEEE
In this paper we present a new fanout optimization algorithm which is particularly suitable for digital circuits designed with submicron CMOS technologies. Restricting the class o...
ISPD
2012
ACM
12 years 21 days ago
2012
ACM
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
PATMOS
2007
Springer
13 years 11 months ago
2007
Springer
—Power consumption has emerged as the premier and most constraining aspect in modern microprocessor and application-specific designs. Gate sizing has been shown to be one of the...