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ISMVL
1994
IEEE
98views Hardware» more  ISMVL 1994»
13 years 9 months ago
Digital Circuit Verification Using Partially-Ordered State Models
Many aspects of digital circuit operation can be efficiently verified by simulating circuit operation over "weakened" state values. This technique has long been practice...
Carl-Johan H. Seger, Randal E. Bryant
ENTCS
2006
173views more  ENTCS 2006»
13 years 4 months ago
Concurrent LSC Verification: On Decomposition Properties of Partially Ordered Symbolic Automata
Partially Ordered Symbolic Automata (POSAs) are used as the semantical foundation of visual formalisms like the scenario based language of Live Sequence Charts (LSCs). To check whe...
Tobe Toben, Bernd Westphal
ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
CAV
1990
Springer
114views Hardware» more  CAV 1990»
13 years 9 months ago
Formal Verification of Digital Circuits Using Symbolic Ternary System Models
Ternary system modeling involves extending the traditional set of binary values
Randal E. Bryant, Carl-Johan H. Seger
FMCAD
2007
Springer
13 years 8 months ago
Combining Symbolic Simulation and Interval Arithmetic for the Verification of AMS Designs
Abstract--Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recentl...
Mohamed H. Zaki, Ghiath Al Sammane, Sofiène...