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» Digital bit stream jitter testing using jitter expansion
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DATE
2008
IEEE
122views Hardware» more  DATE 2008»
13 years 12 months ago
Digital bit stream jitter testing using jitter expansion
This paper presents a time-domain jitter expansion technique for high-speed digital bit sequence jitter testing. While jitter expansion has been applied to phase noise measurement...
Hyun Choi, Abhijit Chatterjee
FPGA
2004
ACM
234views FPGA» more  FPGA 2004»
13 years 9 months ago
An embedded true random number generator for FPGAs
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
Paul Kohlbrenner, Kris Gaj
CCECE
2009
IEEE
13 years 10 months ago
A full-rate truly monolithic CMOS CDR for low-cost applications
A truly monolithic clock and data recovery (CDR) circuit for low cost low-end data communication systems has been realized in 0.6ȝm CMOS. The implemented CDR comprises a phase-an...
Bangli Liang, Zhigong Wang, Dianyong Chen, Bo Wang...