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» Direct Nonlinear Order Reduction with Variational Analysis
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DATE
2004
IEEE
120views Hardware» more  DATE 2004»
13 years 8 months ago
Direct Nonlinear Order Reduction with Variational Analysis
Lihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou,...
DAC
1999
ACM
13 years 9 months ago
Model Order-Reduction of RC(L) Interconnect Including Variational Analysis
As interconnect feature sizes continue to scale to smaller dimensions, long interconnect can dominate the IC timing performance, but the interconnect parameter variations make it ...
Ying Liu, Lawrence T. Pileggi, Andrzej J. Strojwas
DATE
2007
IEEE
126views Hardware» more  DATE 2007»
13 years 11 months ago
WAVSTAN: waveform based variational static timing analysis
— We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dyn...
Saurabh K. Tiwary, Joel R. Phillips
VLSI
2007
Springer
13 years 11 months ago
Parametric structure-preserving model order reduction
Abstract—Analysis and verification environments for nextgeneration nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects,...
Jorge Fernandez Villena, Wil H. A. Schilders, L. M...
AMC
2005
148views more  AMC 2005»
13 years 4 months ago
Review of model order reduction methods for numerical simulation of nonlinear circuits
In this paper, we reviewed several newly presented nonlinear model order reduction methods, we analyze these methods theoretically and with experiments in detail. We show the prob...
Lihong Feng