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MAM
2006
126views more  MAM 2006»
13 years 5 months ago
HiDRA - A reactive multiprocessor architecture for heterogeneous embedded systems
Embedded systems are typically heterogeneous requiring interacting hardware and software components, are locally synchronous while being globally asynchronous and combine both con...
Zoran A. Salcic, Dong Hui, Partha S. Roop, Morteza...
IPPS
2006
IEEE
13 years 11 months ago
A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
Wing On Fung, Tughrul Arslan
EUROPAR
2001
Springer
13 years 10 months ago
Multiprocessor Clustering for Embedded Systems
Abstract. In this paper, we address two key trends in the synthesis of implementations for embedded multiprocessors — (1) the increasing importance of managing interprocessor com...
Vida Kianzad, Shuvra S. Bhattacharyya
ISCAS
2006
IEEE
157views Hardware» more  ISCAS 2006»
13 years 11 months ago
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs
Abstract— Shared memory is a common inter-processor communication paradigm for on-chip multiprocessor SoC (MPSoC) platforms. The latency overhead of switch-based interconnection ...
Daewook Kim, Manho Kim, Gerald E. Sobelman
CODES
1999
IEEE
13 years 9 months ago
Optimized rapid prototyping for real-time embedded heterogeneous multiprocessors
This paper presents an enhancement of our "Algorithm Architecture Adequation" (AAA) prototyping methodology which allows to rapidly develop and optimize the implementati...
Thierry Grandpierre, Christophe Lavarenne, Yves So...