187 search results - page 1 / 38 » Distributed peak power management for many-core architecture... |
EUROPAR
2010
Springer
13 years 5 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
EUROPAR
2010
Springer
13 years 5 months ago
2010
Springer
Abstract. Shared last level cache is crucial to performance. However, multithread program model incurs serious contention in shared cache. In this paper, to reduce average cache ac...
ICPP
2009
IEEE
13 years 11 months ago
2009
IEEE
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
IJPP
2011
12 years 11 months ago
2011
A recent development in radio astronomy is to replace traditional dishes with many small antennas. The signals are combined to form one large, virtual telescope. The enormous data ...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
Moore’s Law suggests that the number of processing cores on a single chip increases exponentially. The future performance increases will be mainly extracted from thread-level par...