50 search results - page 2 / 10 » Dynamic FPGA routing for just-in-time FPGA compilation |
RSP
1999
IEEE
13 years 9 months ago
1999
IEEE
Over the past decade, the steady growth rate of FPGA device capacities has enabled the development of multi-FPGA prototyping environments capable of implementing millions of logic...
FPGA
2009
ACM
13 years 11 months ago
2009
ACM
In this paper we present SPR, a new architecture-adaptive mapping tool for use with Coarse-Grained Reconfigurable Architectures (CGRAs). It combines a VLIW style scheduler and FP...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
FPGA
1999
ACM
13 years 9 months ago
1999
ACM
The demand for high-speed FPGA compilation tools has occurred for three reasons: first, as FPGA device capacity has grown, the computation time devoted to placement and routing h...
FPL
2007
Springer
13 years 11 months ago
2007
Springer
Reconfigurable computing entails the utilization of a generalpurpose processor augmented with a reconfigurable hardware structure (usually an FPGA). Normally, a complete recon...