23 search results - page 2 / 5 » Dynamic Voltage Scaling with Links for Power Optimization of... |
CASES
2005
ACM
13 years 6 months ago
2005
ACM
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
ISSS
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
Dynamic voltage scaling and sleep state control have been shown to be extremely effective in reducing energy consumption in CMOS circuits. Though plenty of research papers have st...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Interconnects have been shown to be a dominant source of energy consumption in modern day System-on-Chip (SoC) designs. With a large (and growing) number of electronic systems bei...