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APCSAC
2004
IEEE
13 years 9 months ago
Dynamic Reallocation of Functional Units in Superscalar Processors
In the context of general-purpose processing, an increasing number of diverse functional units are added to cover a wide spectrum of applications. However, it is still possible to ...
Marc Epalza, Paolo Ienne, Daniel Mlynek
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
13 years 3 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
HPCA
2000
IEEE
13 years 10 months ago
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...
Andreas Moshovos, Gurindar S. Sohi
IPPS
2007
IEEE
13 years 11 months ago
A General Purpose Partially Reconfigurable Processor Simulator (PReProS)
An innovative technique to model and simulate partial and dynamic reconfigurable processors is presented in this paper. The basis for development is a SystemC kernel modified for ...
Alisson Vasconcelos De Brito, Matthias Kühnle...
MICRO
1992
IEEE
99views Hardware» more  MICRO 1992»
13 years 9 months ago
An investigation of the performance of various dynamic scheduling techniques
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...
Michael Butler, Yale N. Patt