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JEC
2006
100views more  JEC 2006»
13 years 5 months ago
RC-SIMD: Reconfigurable communication SIMD architecture for image processing applications
During the last two decades, Single Instruction Multiple Data (SIMD) processors have become important architectures in embedded systems for image processing applications. The main ...
Hamed Fatemi, Bart Mesman, Henk Corporaal, Twan Ba...
FPL
2004
Springer
106views Hardware» more  FPL 2004»
13 years 10 months ago
FiPRe: An Implementation Model to Enable Self-Reconfigurable Applications
ASIPs and reconfigurable processors are architectural choices to extend the capabilities of a given processor. ASIPs suffer from fixed hardware after design, while ASIPs and reconf...
Leandro Möller, Ney Laert Vilar Calazans, Fer...
APCSAC
2004
IEEE
13 years 9 months ago
Dynamic Reallocation of Functional Units in Superscalar Processors
In the context of general-purpose processing, an increasing number of diverse functional units are added to cover a wide spectrum of applications. However, it is still possible to ...
Marc Epalza, Paolo Ienne, Daniel Mlynek
ERSA
2009
131views Hardware» more  ERSA 2009»
13 years 3 months ago
Acceleration of Optical-Flow Extraction Using Dynamically Reconfigurable ALU Arrays
An effective way to implement image processing applications is to use embedded processors with dynamically reconfigurable accelerator cores. The processing speed of these processor...
Hasitha Muthumala Waidyasooriya, Masanori Hariyama...
VLSISP
2008
123views more  VLSISP 2008»
13 years 5 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...