Sciweavers

234 search results - page 1 / 47
» Dynamically Reconfigurable Vision-Chip Architecture
Sort
View
FPL
2010
Springer
103views Hardware» more  FPL 2010»
13 years 2 months ago
Dynamically Reconfigurable Vision-Chip Architecture
Maki Yasuda, Minoru Watanabe
JSA
2010
95views more  JSA 2010»
12 years 11 months ago
Multi-level reconfigurable architectures in the switch model
In this paper we study multi-level dynamically reconfigurable architectures. These are extensions of standard reconfigurable architectures where ordinary reconfiguration operation...
Sebastian Lange, Martin Middendorf
ERSA
2009
185views Hardware» more  ERSA 2009»
13 years 2 months ago
Woolcano: An Architecture And Tool Flow For Dynamic Instruction Set Extension On Xilinx Virtex-4 FX
In this paper, we introduce the Woolcano reconfigurable processor architecture. The architecture is based on the Xilinx Virtex-4 FX FPGA and leverages the Auxiliary Processing Uni...
Mariusz Grad, Christian Plessl
DAC
2000
ACM
13 years 9 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava
FCCM
2004
IEEE
130views VLSI» more  FCCM 2004»
13 years 8 months ago
Hyperreconfigurable Architectures for Fast Run Time Reconfiguration
Dynamically reconfigurable architectures or systems are able to reconfigure their function and/or structure to suit changing needs of a computation during run time. The increasing...
Sebastian Lange, Martin Middendorf