18 search results - page 2 / 4 » EVAL: Utilizing processors with variation-induced timing err... |
DSN
2005
IEEE
13 years 11 months ago
2005
IEEE
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
In recent times, much attention has been devoted to power optimization for real-time systems, while guaranteeing that such systems meet their hard (or soft) scheduling deadlines. ...
DSN
2011
IEEE
12 years 5 months ago
2011
IEEE
—As process technology shrinks devices, circuits experience accelerated wearout. Monitoring wearout will be critical for improving the efficiency of error detection and correctio...
DSN
2002
IEEE
13 years 10 months ago
2002
IEEE
Concentration of design effort for current single-chip Commercial-Off-The-Shelf (COTS) microprocessors has been directed towards performance. Reliability has not been the primary ...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
The shrinking processor feature size, lower threshold voltage and increasing clock frequency make modern processors highly vulnerable to transient faults. Architectural Vulnerabil...