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» Early Power Estimation for System-on-Chip Designs
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PATMOS
2000
Springer
13 years 8 months ago
Early Power Estimation for System-on-Chip Designs
Abstract. Reduction of chip packaging and cooling costs for deep sub-micron SystemOn-Chip (SOC) designs is an emerging issue. We present a simulation-based methodology able to real...
Marcello Lajolo, Luciano Lavagno, Matteo Sonza Reo...
ARCS
2006
Springer
13 years 8 months ago
Estimating Energy Consumption for an MPSoC Architectural Exploration
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
Rabie Ben Atitallah, Smaïl Niar, Alain Greine...
ASAP
2007
IEEE
175views Hardware» more  ASAP 2007»
13 years 6 months ago
Scalable Multi-FPGA Platform for Networks-On-Chip Emulation
Interconnect validation is an important early step toward global SoC (System-On-Chip) validation. Fast performances evaluation and design space exploration for NoCs (Networks-On-C...
Abdellah-Medjadji Kouadri-Mostefaoui, Benaoumeur S...
CODES
2009
IEEE
13 years 9 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
DAC
1996
ACM
13 years 9 months ago
Early Power Exploration - A World Wide Web Application
Abstract: Exploration at the earliest stages of the design process is an integral component of effective low-power design. Nevertheless, superficial high-level analyses with insuff...
David Lidsky, Jan M. Rabaey