5 search results - page 1 / 1 » Effects of process and environmental variations on timing ch... |
GLVLSI
2006
IEEE
13 years 11 months ago
2006
IEEE
ISCAS
2006
IEEE
13 years 11 months ago
2006
IEEE
— Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of variations in the power supply voltage (VDD) on the tim...
SIGMETRICS
2008
ACM
13 years 4 months ago
2008
ACM
Time synchronization is an essential service in distributed computing and control systems. It is used to enable tasks such as synchronized data sampling and accurate time-offlight...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...