Previous works on buffer planning are mainly based on fixed die placement. It is necessary to reduce the complexity of computing the feasible buffer insertion sites to integrate t...
Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, ...
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
— Scientists conducting microarray and other experiments use circular Venn and Euler diagrams to analyze and illustrate their results. As one solution to this problem, this artic...
This paper studies buffer block planning for interconnect-driven floorplanning in deep submicron designs. We first introduce the concept of feasible region (FR) for buffer inserti...
— This paper presents ALA (Adaptable Logarithm Approximation), a novel hardware architecture for the approximation of the base-2 logarithm of integers at an arbitrary accuracy, s...
Dimitris G. Bariamis, Dimitris Maroulis, Dimitrios...