In this paper, we explore the concept of using analytical models to efficiently generate delay change curves (DCCs) that can then be used to characterize the impact of noise on an...
Kanak Agarwal, Yu Cao, Takashi Sato, Dennis Sylves...
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
Hongliang Chang, Vladimir Zolotov, Sambasivan Nara...
—With every process generation, the problem of variability in physical parameters and environmental conditions poses a great challenge to the design of fast and reliable circuits...
Shrikanth Ganapathy, Ramon Canal, Antonio Gonz&aac...
We propose a scalable and efficient parameterized block-based statistical static timing analysis algorithm incorporating both Gaussian and non-Gaussian parameter distributions, ca...
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...