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TC
2010
12 years 11 months ago
Reconfigurable Hardware Implementations of Tweakable Enciphering Schemes
Tweakable enciphering schemes are length preserving block cipher modes of operation that provide a strong pseudo-random permutation. It has been suggested that these schemes can b...
Cuauhtemoc Mancillas-López, Debrup Chakrabo...
SACRYPT
2000
Springer
145views Cryptology» more  SACRYPT 2000»
13 years 8 months ago
Camellia: A 128-Bit Block Cipher Suitable for Multiple Platforms - Design and Analysis
We present a new 128-bit block cipher called Camellia. Camellia supports 128-bit block size and 128-, 192-, and 256-bit keys, i.e. the same interface specifications as the Advanced...
Kazumaro Aoki, Tetsuya Ichikawa, Masayuki Kanda, M...
FPL
2004
Springer
143views Hardware» more  FPL 2004»
13 years 8 months ago
Exploring Area/Delay Tradeoffs in an AES FPGA Implementation
Abstract. Field-Programmable Gate Arrays (FPGAs) have lately become a popular target for implementing cryptographic block ciphers, as a well-designed FPGA solution can combine some...
Joseph Zambreno, David Nguyen, Alok N. Choudhary
DATE
2009
IEEE
139views Hardware» more  DATE 2009»
13 years 11 months ago
Cross-architectural design space exploration tool for reconfigurable processors
—Processors that deploy fine-grained reconfigurable fabrics to implement application-specific accelerators ondemand obtained significant attention within the last decade. They tr...
Lars Bauer, Muhammad Shafique, Jörg Henkel
ARC
2006
Springer
201views Hardware» more  ARC 2006»
13 years 8 months ago
Dynamic Partial Reconfigurable FIR Filter Design
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
Yeong-Jae Oh, Hanho Lee, Chong Ho Lee