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» Efficient Interconnects for Clustered Microarchitectures
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ICCD
2007
IEEE
225views Hardware» more  ICCD 2007»
14 years 1 months ago
Fine grain 3D integration for microarchitecture design through cube packing exploration
Most previous 3D IC research focused on “stacking” traditional 2D silicon layers, so the interconnect reduction is limited to interblock delays. In this paper, we propose tech...
Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinm...
HPCA
2007
IEEE
14 years 5 months ago
Illustrative Design Space Studies with Microarchitectural Regression Models
We apply a scalable approach for practical, comprehensive design space evaluation and optimization. This approach combines design space sampling and statistical inference to ident...
Benjamin C. Lee, David M. Brooks
CLUSTER
2000
IEEE
13 years 8 months ago
Efficient Parallel I/O on SCI Connected Clusters
This paper presents a new approach towards parallel I/O for message-passing (MPI) applications on clusters built with commodity hardware and an SCI interconnect: instead of using t...
Joachim Worringen
ISPDC
2007
IEEE
13 years 11 months ago
Towards Data Partitioning for Parallel Computing on Three Interconnected Clusters
We present a new data partitioning strategy for parallel computing on three interconnected clusters. This partitioning has two advantages over existing partitionings. First it can...
Brett A. Becker, Alexey L. Lastovetsky