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DAC
1997
ACM
13 years 9 months ago
Power Management Techniques for Control-Flow Intensive Designs
This paper presents a low-overhead controller-based power managementtechnique that re-specifies control signals to reconfigure existing multiplexer networks and functional units t...
Anand Raghunathan, Sujit Dey, Niraj K. Jha, Kazuto...
ASPDAC
2007
ACM
107views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Technique to Reduce Peak Current and Average Power Dissipation in Scan Designs by Limited Capture
Abstract-- In this paper, a technique that can efficiently reduce peak and average switching activity during test application is proposed. The proposed method does not require any ...
Seongmoon Wang, Wenlong Wei
TVLSI
2002
103views more  TVLSI 2002»
13 years 5 months ago
Cosimulation-based power estimation for system-on-chip design
We present efficient power estimation techniques for hardware
Marcello Lajolo, Anand Raghunathan, Sujit Dey, Luc...
ECCTD
2011
72views more  ECCTD 2011»
12 years 5 months ago
Managing variability for ultimate energy efficiency
⎯ Technology scaling is in the era where the chip performance is constrained by its power dissipation. Although the power limits vary with the application domain, they dictate th...
Borivoje Nikolic
VLSI
2010
Springer
13 years 3 months ago
Trends and techniques for energy efficient architectures
Abstract--Microprocessor architectures have become increasingly power limited in recent years. Currently power and thermal envelopes dictate peak performance limits more than any o...
Victor Jimenez, Roberto Gioiosa, Eren Kursun, Fran...