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» Efficient SAT-based Boolean matching for FPGA technology map...
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DAC
2006
ACM
11 years 23 days ago
Efficient SAT-based Boolean matching for FPGA technology mapping
Most FPGA technology mapping approaches either target Lookup Tables (LUTs) or relatively simple Programmable Logic Blocks (PLBs). Considering networks of PLBs during technology map...
Sean Safarpour, Andreas G. Veneris, Gregg Baeckler...
TCAD
2008
112views more  TCAD 2008»
9 years 11 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
DAC
2001
ACM
11 years 23 days ago
Publicly Detectable Techniques for the Protection of Virtual Components
Highlighted with the newly released intellectual property (IP) protection white paper by VSI Alliance, the protection of virtual components (VCs) has received a large amount of at...
Gang Qu
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