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» Efficient hardware code generation for FPGAs
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ASAP
2008
IEEE
161views Hardware» more  ASAP 2008»
13 years 7 months ago
Configurable and scalable high throughput turbo decoder architecture for multiple 4G wireless standards
In this paper, we propose a novel multi-code turbo decoder architecture for 4G wireless systems. To support various 4G standards, a configurable multi-mode MAP (maximum a posterio...
Yang Sun, Yuming Zhu, Manish Goel, Joseph R. Caval...
ACSD
2010
IEEE
251views Hardware» more  ACSD 2010»
13 years 3 months ago
Modular Interpretation of Heterogeneous Modeling Diagrams into Synchronous Equations Using Static Single Assignment
Abstract--The ANR project SPaCIFY develops a domainspecific programming environment, Synoptic, to engineer embedded software for space applications. Synoptic is an Eclipse-based mo...
Jean-Pierre Talpin, Julien Ouy, Thierry Gautier, L...
CL
2008
Springer
13 years 5 months ago
Automatic synthesis and verification of real-time embedded software for mobile and ubiquitous systems
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
Pao-Ann Hsiung, Shang-Wei Lin
ASAP
2003
IEEE
141views Hardware» more  ASAP 2003»
13 years 11 months ago
Automatic Instruction Set Extension and Utilization for Embedded Processors
There is a growing demand for application-specific embedded processors in system-on-a-chip designs. Current tools and design methodologies often require designers to manually spec...
Armita Peymandoust, Laura Pozzi, Paolo Ienne, Giov...
SAC
2003
ACM
13 years 11 months ago
Real-Time Monitoring of Large Scientific Simulations
We present a distributed framework that enables real-time streaming and visualization of data generated by large remote simulations. We address issues arising from distributed cli...
Valerio Pascucci, Daniel E. Laney, Ray J. Frank, F...