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DSD
2008
IEEE
115views Hardware» more  DSD 2008»
13 years 11 months ago
An Efficient Multiple-Parity Generator Design for On-Line Testing on FPGA
We propose a method to efficiently design a “parity generator”, which is a stand-alone block producing multiple parity bits of a given circuit. The parity generator is designe...
Petr Fiser, Pavel Kubalík, Hana Kubatova
STOC
2004
ACM
157views Algorithms» more  STOC 2004»
14 years 5 months ago
Derandomizing homomorphism testing in general groups
The main result of this paper is a near-optimal derandomization of the affine homomorphism test of Blum, Luby and Rubinfeld (Journal of Computer and System Sciences, 1993). We sho...
Amir Shpilka, Avi Wigderson
KES
2010
Springer
13 years 3 months ago
Group Formation for Collaboration in Exploratory Learning Using Group Technology Techniques
Exploratory Learning Environments (ELEs) allow learners to approach a problem in different ways; they are particularly suitable for ill-defined problems where knowledge is less str...
Mihaela Cocea, George D. Magoulas
ATS
2002
IEEE
108views Hardware» more  ATS 2002»
13 years 10 months ago
Fault Set Partition for Efficient Width Compression
In this paper, we present a technique for reducing the test length of counter-based pseudo-exhaustive built-in self-testing (BIST) based on width compression method. More formally...
Emil Gizdarski, Hideo Fujiwara
JSS
2010
104views more  JSS 2010»
13 years 2 days ago
Using hybrid algorithm for Pareto efficient multi-objective test suite minimisation
Test suite minimisation techniques seek to reduce the effort required for regression testing by selecting a subset of test suites. In previous work, the problem has been considere...
Shin Yoo, Mark Harman