34 search results - page 3 / 7 » Elimination of Crucial Faults by a New Selective Testing Met... |
ICES
2000
Springer
13 years 9 months ago
2000
Springer
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
ET
2008
13 years 5 months ago
2008
Processor cores embedded in systems-on-a-chip (SoCs) are often deployed in critical computations, and when affected by faults they may produce dramatic effects. When hardware harde...
EURODAC
1995
IEEE
13 years 9 months ago
1995
IEEE
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
ICSM
2005
IEEE
13 years 11 months ago
2005
IEEE
Regression testing is a widely-used method for checking whether modifications to software systems have adversely affected the overall functionality. This is potentially an expens...
ITC
1995
IEEE
13 years 9 months ago
1995
IEEE
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...