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DATE
2008
IEEE
141views Hardware» more  DATE 2008»
13 years 11 months ago
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies
Georges G. E. Gielen, P. De Wit, Elie Maricau, J. ...
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Recent Research and Emerging Challenges in Physical Design for Manufacturability/Reliability
As IC process geometries scale down to the nanometer territory, the industry faces severe challenges of manufacturing limitations. To guarantee yield and reliability, physical des...
Chung-Wei Lin, Ming-Chao Tsai, Kuang-Yao Lee, Tai-...
ICCAD
2006
IEEE
208views Hardware» more  ICCAD 2006»
14 years 1 months ago
Automation in mixed-signal design: challenges and solutions in the wake of the nano era
The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...
Trent McConaghy, Georges G. E. Gielen
DAC
2006
ACM
14 years 5 months ago
Are carbon nanotubes the future of VLSI interconnections?
Increasing resistivity of copper with scaling and rising demands on current density requirements are driving the need to identify new wiring solutions for deep nanometer scale VLS...
Kaustav Banerjee, Navin Srivastava
DAC
2009
ACM
14 years 5 months ago
Decoding nanowire arrays fabricated with the multi-spacer patterning technique
Silicon nanowires are a promising solution to address the increasing challenges of fabrication and design at the future nodes of the Complementary Metal-Oxide-Semiconductor (CMOS)...
M. Haykel Ben Jamaa, Yusuf Leblebici, Giovanni De ...