70 search results - page 1 / 14 » Enabling SystemC Verification using Abstract State Machines |
FDL
2004
IEEE
13 years 9 months ago
2004
IEEE
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
ng precision of abstract SystemC models using the SystemC Verification Standard Franco Carbognani1 , Christopher K. Lennard2 , C. Norris Ip3 , Allan Cochrane2 , Paul Bates2 1 Caden...
MEMOCODE
2010
IEEE
13 years 3 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
DATE
2004
IEEE
13 years 9 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
CAV
2007
Springer
13 years 9 months ago
2007
Springer
Abstract. In this paper, we describe the features of the Timed Abstract State Machine toolset. The toolset implements the features of the Timed Abstract State Machine (TASM) langua...