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» Energy efficient packet classification hardware accelerator
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MICRO
2010
IEEE
130views Hardware» more  MICRO 2010»
13 years 4 months ago
Pseudo-Circuit: Accelerating Communication for On-Chip Interconnection Networks
As the number of cores on a single chip increases with more recent technologies, a packet-switched on-chip interconnection network has become a de facto communication paradigm for ...
Minseon Ahn, Eun Jung Kim
AICCSA
2005
IEEE
164views Hardware» more  AICCSA 2005»
13 years 11 months ago
Efficient aggregation of delay-constrained data in wireless sensor networks
Recent years have witnessed a growing interest in the application of wireless sensor networks in unattended environments. Nodes in such applications are equipped with limited ener...
Kemal Akkaya, Mohamed F. Younis, Moustafa Youssef
DAC
2008
ACM
14 years 7 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
TMC
2010
165views more  TMC 2010»
13 years 25 days ago
Energy-Efficient VoIP over Wireless LANs
Emerging dual-mode phones incorporate a Wireless LAN (WLAN) interface along with the traditional cellular interface. The additional benefits of the WLAN interface are, however, lik...
Vinod Namboodiri, Lixin Gao
IADIS
2003
13 years 7 months ago
Effects of Ordered Access Lists in Firewalls
Firewalls are hardware and software systems that protect a network from attacks coming from the Internet. Packet filtering firewalls are efficient, fast and provide a good level o...
Faheem Bukhatwa, Ahmed Patel