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» Energy efficient packet classification hardware accelerator
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ANCS
2006
ACM
13 years 11 months ago
Design of a web switch in a reconfigurable platform
The increase of the web traffic has created the need for web switches that are able to balance the traffic to the server farms based on their contents (e.g. layer 7 switching). In...
Christoforos Kachris, Stamatis Vassiliadis
ISCAS
2006
IEEE
112views Hardware» more  ISCAS 2006»
13 years 11 months ago
Towards an optimised VLSI design algorithm for the constant matrix multiplication problem
The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Andrew Kinane, Valentin Muresan, Noel E. O'Connor
TON
2010
93views more  TON 2010»
12 years 12 months ago
Design and field experimentation of an energy-efficient architecture for DTN throwboxes
Disruption tolerant networks rely on intermittent contacts between mobile nodes to deliver packets using a storecarry-and-forward paradigm. We earlier proposed the use of throwbox ...
Nilanjan Banerjee, Mark D. Corner, Brian Neil Levi...
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 3 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
INFOCOM
1998
IEEE
13 years 9 months ago
Adaptive Resource Management for Flow-Based IP/ATM Hybrid Switching Systems
This paper addresses a fundamental problem in resource management for flow-based hybrid switching systems. Such systems aim at efficient transport of layer-3 connectionless IP traf...
Hao Che, San-qi Li, Arthur Y. M. Lin