26 search results - page 2 / 6 » Enhancing FPGA Performance for Arithmetic Circuits |
TVLSI
2008
13 years 5 months ago
2008
With the density of FPGAs steadily increasing, FPGAs have reached the point where they are capable of implementing complex floating-point applications. However, their general-purpo...
FCCM
1998
IEEE
13 years 9 months ago
1998
IEEE
PAM-Blox are object-oriented circuit generators on top of the PCI Pamette design environment, PamDC. High- performance FPGA design for adaptive computing is simplified by using a ...
MAM
2008
13 years 5 months ago
2008
This paper presents a design methodology for a hybrid Hardwarein-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous sy...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
FPGA application developers often attempt to use pipelining, Cslowing and retiming to improve the performance of their designs. Unfortunately, such registered netlists present a f...
IPPS
2005
IEEE
13 years 11 months ago
2005
IEEE
The use of pipelined floating-point arithmetic cores to create high-performance FPGA-based computational kernels has introduced a new class of problems that do not exist when usi...