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» Evaluating Hardware Compilation Techniques
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FPL
2003
Springer
259views Hardware» more  FPL 2003»
13 years 10 months ago
Branch Optimisation Techniques for Hardware Compilation
Abstract. This paper explores using information about program branch probabilities to optimise reconfigurable designs. The basic premise is to promote utilization by dedicating mo...
Henry Styles, Wayne Luk
FCCM
2002
IEEE
321views VLSI» more  FCCM 2002»
13 years 10 months ago
Queue Machines: Hardware Compilation in Hardware
Abstract - In this paper, we hypothesize that reconfigurable computing is not more widely used because of the logistical difficulties caused by the close coupling of applications a...
Herman Schmit, Benjamin A. Levine, Benjamin Ylvisa...
HICSS
2003
IEEE
138views Biometrics» more  HICSS 2003»
13 years 10 months ago
Towards Verifying Parametrised Hardware Libraries with Relative Placement Information
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
Steve McKeever, Wayne Luk, Arran Derbyshire
ASPDAC
2007
ACM
117views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Short-Circuit Compiler Transformation: Optimizing Conditional Blocks
Abstract-- We present the short-circuit code transformation technique, intended for embedded compilers. The transformation technique optimizes conditional blocks in high-level prog...
Mohammad Ali Ghodrat, Tony Givargis, Alex Nicolau