12 search results - page 1 / 3 » Explicit evaluation of short circuit power dissipation for C... |
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
When estimating the dynamic power dissipated by a circuit di erent methods ranging from numeric analog simulation to event-driven logic simulation have been proposed. However, as ...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
A new circuit technique is proposed in this paper for simultaneously reducing the subthreshold and gate oxide leakage power in domino logic circuits. PMOS-only sleep transistors ar...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
— The work presented in this paper is about the design of current-controlled oscillators (ICO). Two ICOs are proposed. Aiming at reducing the duration of the short-circuit curren...
ASPDAC
1998
ACM
13 years 9 months ago
1998
ACM
-- The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET fl...