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SBACPAD
2007
IEEE
121views Hardware» more  SBACPAD 2007»
13 years 11 months ago
DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
Roberto Giorgi, Zdravko Popovic, Nikola Puzovic
ICRA
2010
IEEE
185views Robotics» more  ICRA 2010»
13 years 3 months ago
MOPED: A scalable and low latency object recognition and pose estimation system
— The latency of a perception system is crucial for a robot performing interactive tasks in dynamic human environments. We present MOPED, a fast and scalable perception system fo...
Manuel Martinez, Alvaro Collet, Siddhartha S. Srin...
ICDCS
2006
IEEE
13 years 11 months ago
A Locality-Aware Cooperative Cache Management Protocol to Improve Network File System Performance
In a distributed environment the utilization of file buffer caches in different clients may vary greatly. Cooperative caching is used to increase cache utilization by coordinatin...
Song Jiang, Fabrizio Petrini, Xiaoning Ding, Xiaod...
IPPS
1998
IEEE
13 years 9 months ago
High Performance Data Mining Using Data Cubes on Parallel Computers
On-Line Analytical Processing techniques are used for data analysis and decision support systems. The multidimensionality of the underlying data is well represented by multidimens...
Sanjay Goil, Alok N. Choudhary
SC
2009
ACM
14 years 1 days ago
Scalable computing with parallel tasks
Recent and future parallel clusters and supercomputers use SMPs and multi-core processors as basic nodes, providing a huge amount of parallel resources. These systems often have h...
Jörg Dümmler, Thomas Rauber, Gudula R&uu...