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» Exploiting Regularities for Boolean Function Synthesis
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MST
2006
120views more  MST 2006»
13 years 4 months ago
Exploiting Regularities for Boolean Function Synthesis
The "regularity" of a Boolean function can be exploited for decreasing its minimization time. It has already been shown that the notion of autosymmetry is a valid measure...
Anna Bernasconi, Valentina Ciriani, Fabrizio Lucci...
TCAD
2008
112views more  TCAD 2008»
13 years 4 months ago
Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs
Boolean matching is one of the enabling techniques for technology mapping and logic resynthesis of Field Programmable Gate Array (FPGA). SAT-based Boolean matching (SAT-BM) has bee...
Yu Hu, Victor Shih, Rupak Majumdar, Lei He
DAC
2010
ACM
13 years 8 months ago
Lattice-based computation of Boolean functions
This paper studies the implementation of Boolean functions with lattices of two-dimensional switches. Each switch is controlled by a Boolean literal. If the literal is 1, the swit...
Mustafa Altun, Marc D. Riedel
ISVLSI
2007
IEEE
107views VLSI» more  ISVLSI 2007»
13 years 11 months ago
A Hash-based Approach for Functional Regularity Extraction During Logic Synthesis
Performance, power, and functionality, yield and manufacturability are rapidly becoming additional critical factors that must be considered at higher levels of ion. A possible sol...
Angelo P. E. Rosiello, Fabrizio Ferrandi, Davide P...
ICCD
2003
IEEE
127views Hardware» more  ICCD 2003»
14 years 1 months ago
Structural Detection of Symmetries in Boolean Functions
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using spe...
Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangi...