40 search results - page 2 / 8 » Exploiting Value Locality in Physical Register Files |
ICPP
2006
IEEE
13 years 11 months ago
2006
IEEE
We propose a series of aggressive register deallocation mechanisms to reduce the register file pressure and increase the parallelism exploited by superscalar microprocessors. Our ...
DSN
2006
IEEE
13 years 11 months ago
2006
IEEE
Protecting the register value and its data buses is crucial to reliable computing in high-performance microprocessors due to the increasing susceptibility of CMOS circuitry to sof...
ISCA
1999
IEEE
13 years 10 months ago
1999
IEEE
This paper presents a technique called register value prediction (RVP) which uses a type of locality called register-value reuse. By predicting that an instruction will produce th...
ISVLSI
2007
IEEE
14 years 1 days ago
2007
IEEE
Designing high-performance low-power register files is of critical importance to the continuation of current performance advances in wide-issue and deeply-pipelined superscalar m...
HPCA
2005
IEEE
14 years 6 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...