110 search results - page 2 / 22 » Exploiting Vector Parallelism in Software Pipelined Loops |
CGO
2010
IEEE
13 years 11 months ago
2010
IEEE
Decoupled Software Pipelining (DSWP) is one approach to automatically extract threads from loops. It partitions loops into long-running threads that communicate in a pipelined man...
TVLSI
2008
13 years 4 months ago
2008
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
HICSS
1996
IEEE
13 years 9 months ago
1996
IEEE
To take advantage of recent architectural improvements in microprocessors, advanced compiler optimizations such as software pipelining have been developed 1, 2, 3, 4]. Unfortunate...
SASP
2009
IEEE
13 years 11 months ago
2009
IEEE
—Multi-cycle Instruction set extensions (ISE) can be pipelined in order to increase their throughput; however, typical program traces seldom contain consecutive calls to the same...
CGO
2008
IEEE
13 years 11 months ago
2008
IEEE
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...