29 search results - page 1 / 6 » Exploration of Area and Performance Optimized Datapath Desig... |
ISCAS
1995
IEEE
13 years 8 months ago
1995
IEEE
We present a novel technique for datapath allocation, which incorporates interconnection area and delay estimates based on dynamic oorplanning. In this approach, datapath area is ...
DAC
2000
ACM
13 years 9 months ago
2000
ACM
Datapath design is one of the most critical elements in the design of a high performance microprocessor. However datapath design is typically done manually, and is often custom st...
ISSS
1996
IEEE
13 years 8 months ago
1996
IEEE
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
ICCAD
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...