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» Exploring Memory Hierarchy with ArchC
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HOTI
2005
IEEE
13 years 11 months ago
Challenges in Building a Flat-Bandwidth Memory Hierarchy for a Large-Scale Computer with Proximity Communication
Memory systems for conventional large-scale computers provide only limited bytes/s of data bandwidth when compared to their flop/s of instruction execution rate. The resulting bo...
Robert J. Drost, Craig Forrest, Bruce Guenin, Ron ...
DAC
2009
ACM
14 years 7 months ago
PDRAM:a hybrid PRAM and DRAM main memory system
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges in...
Gaurav Dhiman, Raid Ayoub, Tajana Rosing
CF
2005
ACM
13 years 8 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
SIGMETRICS
2010
ACM
103views Hardware» more  SIGMETRICS 2010»
13 years 21 days ago
VM power metering: feasibility and challenges
This paper explores the feasibility of and challenges in developing methods for black-box monitoring of a VM's power usage at runtime, on shared virtualized compute platforms...
Bhavani Krishnan, Hrishikesh Amur, Ada Gavrilovska...
DAC
1999
ACM
14 years 7 months ago
Memory Exploration for Low Power, Embedded Systems
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
Wen-Tsong Shiue, Chaitali Chakrabarti