Sciweavers

16 search results - page 3 / 4
» Eyecharts: constructive benchmarking of gate sizing heuristi...
Sort
View
ICCAD
2009
IEEE
161views Hardware» more  ICCAD 2009»
13 years 2 months ago
The epsilon-approximation to discrete VT assignment for leakage power minimization
As VLSI technology reaches 45nm technology node, leakage power optimization has become a major design challenge. Threshold voltage (vt) assignment has been extensively studied, du...
Yujia Feng, Shiyan Hu
ATVA
2006
Springer
114views Hardware» more  ATVA 2006»
13 years 8 months ago
Selective Approaches for Solving Weak Games
Abstract. Model-checking alternating-time properties has recently attracted much interest in the verification of distributed protocols. While checking the validity of a specificati...
Malte Helmert, Robert Mattmüller, Sven Schewe
ECAI
2010
Springer
13 years 5 months ago
Brothers in Arms? On AI Planning and Cellular Automata
AI Planning is concerned with the selection of actions towards achieving a goal. Research on cellular automata (CA) is concerned with the question how global behaviours arise from ...
Jörg Hoffmann, Nazim Fatès, Héc...
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
13 years 9 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...
TCAD
2008
119views more  TCAD 2008»
13 years 4 months ago
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
Abstract-- In this paper, we present a very fast and accurate rectilinear Steiner minimal tree (RSMT) algorithm called FLUTE. FLUTE is based on pre-computed lookup table to make RS...
Chris C. N. Chu, Yiu-Chung Wong