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» FPGA Implementations of the Massively Parallel GCA Model
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GCA
2008
13 years 6 months ago
Grid-enabling complex system applications with QosCosGrid: An architectural perspective
Grids are becoming mission-critical components in research and industry, offering sophisticated solutions in leveraging largescale computing and storage resources. Grid resources ...
Valentin Kravtsov, David Carmeli, Werner Dubitzky,...
FPL
2008
Springer
163views Hardware» more  FPL 2008»
13 years 6 months ago
Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system
We have constructed a FPGA-based "early neural circuit simulator" to model the first two stages of stimulus encoding and processing in the rat whisker system. Rats use t...
Brian Leung, Yan Pan, Chris Schroeder, Seda Ogrenc...
FPL
2006
Springer
242views Hardware» more  FPL 2006»
13 years 8 months ago
TMD-MPI: An MPI Implementation for Multiple Processors Across Multiple FPGAs
With current FPGAs, designers can now instantiate several embedded processors, memory units, and a wide variety of IP blocks to build a single-chip, high-performance multiprocesso...
Manuel Saldaña, Paul Chow
FPL
2010
Springer
170views Hardware» more  FPL 2010»
13 years 2 months ago
IP Based Configurable SIMD Massively Parallel SoC
Significant advances in the field of configurable computing have enabled parallel processing within a single FieldProgrammable Gate Array (FPGA) chip. This paper presents the imple...
Mouna Baklouti, Mohamed Abid, Philippe Marquet, Je...
FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
13 years 11 months ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...