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ASAP
2008
IEEE
146views Hardware» more  ASAP 2008»
14 years 14 days ago
A multi-FPGA application-specific architecture for accelerating a floating point Fourier Integral Operator
Many complex systems require the use of floating point arithmetic that is exceedingly time consuming to perform on personal computers. However, floating point operators are also h...
Jason Lee, Lesley Shannon, Matthew J. Yedlin, Gary...
CAMP
2005
IEEE
13 years 11 months ago
Parallel Extraction Architecture for Image Moments of Numerous Objects
— In this paper, we propose a new architecture that can extract information of numerous objects in an image at highspeed. Various characteristics can be obtained from the image m...
Yoshihiro Watanabe, Takashi Komuro, Shingo Kagami,...
ACIVS
2006
Springer
13 years 12 months ago
Dedicated Hardware for Real-Time Computation of Second-Order Statistical Features for High Resolution Images
We present a novel dedicated hardware system for the extraction of second-order statistical features from high-resolution images. The selected features are based on gray level co-o...
Dimitris G. Bariamis, Dimitrios K. Iakovidis, Dimi...
PC
2002
158views Management» more  PC 2002»
13 years 5 months ago
On parallel block algorithms for exact triangularizations
We present a new parallel algorithm to compute an exact triangularization of large square or rectangular and dense or sparse matrices in any field. Using fast matrix multiplicatio...
Jean-Guillaume Dumas, Jean-Louis Roch
ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
14 years 24 days ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...